The present invention relates generally to semiconductor integrated circuits. More particularly, it pertains to the structure and method for improved signal processing.
There is a requirement in analog and radio frequency (RF) integrated circuits for devices known as mixers or multipliers which can take the product of two signals, not just the sum or difference as in simple analog amplifiers or analog computers. This enables the construction of variable gain amplifiers, modulators, heterodyne receivers, frequency multipliers, frequency dividers, synthesizers, and a wide variety of other signal processing functions.
Integrated circuits, such as mixers and multipliers, require the use of a nonlinear solid state device. The simplest nonlinear device employed in a signal mixer or multiplier is the diode such as used in TV satellite receivers. The nonlinear characteristics of the diode are used to obtain an intermediate frequency from the product of a local oscillator frequency and an input signal frequency. This product yields, besides the original signals, signals at the sum and differences of the local oscillator frequency and an input signal frequency. The intermediate signal frequency at the difference of the local oscillator frequency and an input signal frequency is used for down conversion of the input signal frequency to lower frequencies where it can then be more easily amplified and demodulated to remove the useful information.
Transistors are also used to fabricate integrated circuits which have the mixer and multiplier capability. Often metal-semiconductor field effect transistors (MESFET""s) are employed as the nonlinear solid state device. The MESFET is typically referred to as a dual gate FET, as used in RF GaAs integrated circuits. The device structure can be understood in simple terms by considering it to be two FETs in series where dual gates of the MESFET are adjacent to each other and in series between the source and drain. Further, the drain of the first or lower transistor is in contact, internally, with the source of the upper or top device and there is no external contact to this point. The action of this device can be understood by realizing the gate to source voltage of the second or top device depends on the biasing of the gate to source voltage of the lower or bottom device. This results in the operation depending on the product of the signals on the two gates. Such GaAs dual gate FETs are typically used in a wide variety of signal processing functions at high frequencies, e.g., in the gigahertz (GHz) range including, most recently, cellular or wireless telephones.
Wireless or cellular telephones provide a good example of the shortcomings with using MESFETs in digital technology applications. That is, such digital devices require the integration of both RF and digital integrated circuit functions. Integrating analog and digital circuitry requires significant circuitry real estate and involves non-analogous fabrication steps. The push in integrated circuit technology is to develop more and more compact devices through simplified processing routines. It would be ideal to incorporate both analog and digital functions on a single chip while at the same time maintaining streamlined fabrication processes. Thus, there is a need for RF and digital integrated circuits which can be implemented on a single integrated circuit chip, e.g., a single complementary metal oxide semiconductor (CMOS) integrated circuit chip, using analogous fabrication techniques.
The above-mentioned problems with integrated circuits and other problems are addressed by the present invention and will be understood by reading and studying the following specification. A structure and method which offer improved functionality are provided.
In particular, an illustrative embodiment of the present invention includes a mixer circuit. The mixer circuit has a transistor extending outwardly from a semiconductor substrate. The transistor has a first source/drain region, a body region, and a second source/drain region. The body region has opposing sidewall surfaces. And, the body region is formed of a fully depleted structure. A first gate is located on a first one of the opposing sidewall surfaces. A second gate is located on a second one of the opposing sidewall surfaces. Further, a local oscillator is coupled to the first gate, and a signal input is coupled to the second gate.
In another embodiment of the present invention, an analog circuit is provided. The analog circuit includes a dual-gated metal-oxide semiconducting field effect transistor (MOSFET) which extends outwardly from a semiconductor substrate. The dual-gated MOSFET has a first and a second source/drain region. The dual-gated MOSFET has a body region which includes opposing sidewall surfaces. The body region is formed of a fully depleted structure. A first gate is located on a first one of the opposing sidewall surfaces. A second gate located on a second one of the opposing sidewall surfaces. Further, a local oscillator can be coupled to the first gate to receive signals from a local oscillator signal and an analog signal input can be coupled to the second gate and provides an input signal to the second gate.
In another embodiment of the present invention, a signal processing integrated circuit is provided which includes both analog and digital circuits. The analog circuit includes a dual-gated metal-oxide semiconducting field effect transistor (MOSFET) which extends outwardly from a semiconductor substrate. The dual-gated MOSFET has a first and a second source/drain region. The dual-gated MOSFET has a body region which includes opposing sidewall surfaces. The body region is formed of a fully depleted structure. A first gate is located on a first one of the opposing sidewall surfaces. A second gate is located on a second one of the opposing sidewall surfaces. Further, a local oscillator can be coupled to the first gate to receive signals from a local oscillator signal and an analog signal input can be coupled to the second gate and provides an input signal to the second gate.
In another embodiment of the present invention, a communication device is provided. The communication device includes a signal processing circuit. The signal processing circuit has a dual-gated metal-oxide semiconducting field effect transistor (MOSFET) which extends outwardly from a semiconductor substrate. The dual-gated MOSFET includes a first and a second source/drain region. The dual-gated MOSFET has a body region which has opposing sidewall surfaces. The body region is formed of a fully depleted structure. A first gate is located on a first one of the opposing sidewall surfaces. A second gate is located on a second one of the opposing sidewall surfaces. Further, a local oscillator is coupled to the first gate and provides a local oscillator signal to the first gate. A signal input is coupled to the second gate and provides an input signal to the second gate. The communication device also includes a receiver and a transmitter which are electrically coupled to the signal processing circuit for receiving and transmitting signals.
Yet another embodiment of the present invention includes a method of signal processing. The method includes biasing a first gate of a dual-gated MOSFET. The dual-gated MOSFET has a first and a second source/drain region. The dual-gated MOSFET has a body region which has opposing sidewall surfaces. The body region is formed from a fully depleted structure. The first gate opposes a first one of the opposing sidewall surfaces. A second gate of the dual-gated MOSFET is similarly biased. The second gate opposes a second one of the opposing sidewall surfaces. The method further includes a local oscillator signal to the first gate and applying an input signal to the second gate.
Thus, an improved structure and method are provided for signal processing. The structure includes a dual-gated metal-oxide semiconducting field effect transistor (MOSFET). The dual-gated MOSFET can be fabricated according to current CMOS processing techniques. The body region of the dual-gated MOSFET is a fully depleted structure. The structure includes two gates which are positioned on opposite sides of the opposing sides of the body region. Further, the structure operates as one device where the threshold voltage of one gate depends on the bias of the other gate. Thus, the structure yields a small signal component in analog circuit applications which depends on the product of the signals applied to the gates, and not simply one which depends on the sum of the two signals.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.